Applications of Mixed-Signal Technology in Digital Testing

For reducing the test application time and required tester pins per device, we propose the use of multi-valued logic (MVL) signals, which increases data rate between the device under test (DUT) and automatic test equipment (ATE). An MVL signal sends multiple bits of information per clock cycle on a physical channel. Conversion of signals between binary andMVL is accomplished by digital to analog and analog to digital converters available in the mixed-signal technology. To support MVL test application and avoid reliability issues, we add necessary modifications on ATE and DUT sides. Theoretical calculation and a prototype experiment demonstrate significant data rate increase. We integrate the proposedMVL technique into test methodologies involving reduced pin-count test (RPCT) for multi-core system-on-chip (SoC) and test compression. An Responsible Editor: L. M. Bolzani Pöhls Research reported in this paper is derived from a PhD dissertation [17]. Parts of this work have been presented at 16th IEEE Latin American Test Symposium, 2015 [20], 24th IEEE North Atlantic Test Workshop, 2015 [18] and 223rd IEEE North Atlantic Test Workshop, 2014 [19]. Vishwani D. Agrawal [email protected] Baohu Li [email protected]; [email protected] 1 Department of Electrical and Computer Engineering, Auburn University, Auburn, AL 36849, USA 2 Present address: Broadcom Corporation, Sunnyvale, CA 94086, USA actual automatic test equipment (ATE) based test of a DUT shows notable reduction in test application time with MVL